S1 (2.0D), S2 (2.1D), S3 (2.2D), S4 Integrated Substrate Provider
No through vias(TSVs, TLVs..) required.
No solders required between interposer / substrate / PCB.
One Integrated Substrate can replace the combination of silicon interposer and substrate.
Meet functional requirements and simplifies the manufacturing logistic.
Quick product prototyping.
SiPlus is developing system integration technologies and products that meet functional requirement with less impact to the environment.
Invited talk Dyi Chung Hu, “Technologies for Heterogeneous Integration in the GAI Era”.
Keynote Speech Dyi Chung Hu, “2.XD Integrated Substrate Solutions for High-Performance Computing”.
Chia-Peng Sun, et al., “Optimization of 2.2D Underfill Process by Novel Methodology and Direct Observation of Capillary Underfill Process”.
Dyi Chung Hu, et al., “In-situ observation of underfill dispensing process”. L. H. Shen, et al., “Predicting Void Reduction of Flip Chip Package in the Pressure Oven”.
Dyi Chung Hu, et al., “Method of doubling the wafer level RDL layers in 2.2D and RDL Substrate”.
Dyi Chung Hu, et al., “A Novel Equivalent Model for Underfill Molding Process On 2.2D Structure for High Performance Applications”.
Dyi Chung Hu, SR 2022 paper, “2.2D Die last Integrated Substrate for Heterogeneous Integration Applications”.
Dyi Chung Hu, et. al. "2.2D Die last Integrated Substrate for High Performance Applications".
D.C. Hu and James Ho "Methods to Reduce the Hierarchy of Interconnections in Electronic System".